Power Amplifier Differential Input Stage Testing

Most of the power amplifiers in the wild today are based about the three stage achitecture proposed by Mr. Lin or RCA in 1950. Three stage architecture, increases freedom of design, separates distortion sources and allows a more stable (in terms of Nyquist stability) and linear amplifier to be designed.

The basic three stage architecture is depicted in Fig.1.

Fig.1 Lin three stage architecture

Lets remember some basic principles of power amplifiers of this architecture. 

First lets talk about the function of each stage:

• The input stage is a transcundactance stage (Long Tailed Pair LTP): voltage difference in, current out
• VAS stage is a transadmittance stage: current in, voltage out
• Output stage (drivers and output semiconductors): unity gain voltage follower (voltage amplifier)

Second, we seperate the spectrum range in to two ranges; the LF range and the HF range, which are seperated by the dominant pole P1 created by the CC Miller compensation capacitor at the VAS stage.

The amplifier's Open-Loop Gain for LF is: $$ A_{O(LF)}=g_{m}\cdot \beta_{VAS} \cdot Z_{c} $$

where gm is the transconductace of the input stage, β is the beta parameter of the VAS BJT transostor and Zc is the impendance of the load at the collector of the VAS stage. Notice that the gain remains constant for frequencies below the dominant pole P1.

For HF: $$ A_{O(HF)}=\frac{g_{m}}{2\pi fC_{c}} $$, where f is the frequency and Cc is the capacitance of the Miller compensation capacitor of the VAS.

Today I ran some simulation experiments, focusing on the differential input stage of the amplifier.

How do we separate the input stage for testing? I stumbled across two ingenious methods proposed by Douglas Self and Randy Slone and today I employed the method of the latter to test input stage, as seen in Fig.2, which contains a very basic input stage topology, a buffered VAS stage with a constant current source as VAS collector load. Containing the VAS stage in the method is essential, because of the NFB required to be given to the Q2 of the differential input stage. Output stage is not needed. (For further details look Randy Slone: High Power Audio Amplifier Design Handbook).

Fig.2 Input stage separation (method by Randy Slone)

The transconductance and linearity of the input stage is a function of the tail current of the LTP and how balanced is it between the two legs in the collectors of Q1, Q2 in Fig.2.

R1 , R6, R7, Q1, Q2 form the input stage, R3, R4, R5, C4, C5, D1 is the NFB decoupling network, R2, C2, C3 the input decoupling network, C1, C7 the power supply decoupling capacitors, R8, C6, Q3, Q4, I1 form the VAS stage.

The current balance and regulation of the input stage is bad. The  DC current balance when no signal is present 0.19mA run through Q1, whereas at Q2 there is 3.89mA. Very bad!!!!

A signal of 2.115Vpk is applied at the input to produce an output at about ~94.2Vpk-pk close to the clipping level. The AC current that flows in Q1, Q2 is shown in Fig.3 and shows a great imbalance that gives a rise in harmonic distortion, especially in second and third harmonics.

Fig.3a Current imbalance at simple input stage

Fig.3b Transconductance (rms) of simple input stage

The second harmonic rise is due to the absence of current regulation in the emitters of Q1 and Q2, but the third harmonic rise is due to current imbalance between Q1 and Q2 collector legs.

Improving the circuit demands adding a current source as a form of emitter degeneration and a current mirror as collector load that fixes the imbalance.

Fig.4 Proper fixes for input stage linearity

Q5, Q6, R1, R9, R10, R11, C8 are the current source for the emitters of the LTP. Q7, Q8, R6, R7 are the current mirror for the collectors of the LTP. Current source guarantees a constant current regulation independent of the LTP impedance, while current mirror fixes the current imbalance between Q1 and Q2 collector legs. R6 and R7 are current mirror's degeneration resistors for eleminating the effect of β of Q7, Q8 (because they will not be exactly the same). Any change in current in Q7 will be reflected in Q8 and vice versa, thus keeping a balance.
R1 is the degeneration resistor for Q5, increasing linearity of current source and C8 is required for Power Supply Rejection at the current source.
The DC currents at Q1 and Q2 when no signal is present are: 2.23mA for Q1 and 2.26mA for Q2. Great improvement!!!
A transient analysis for the same input signal as before is shown in Fig.5.

Fig.5a Current balance at fixed input stage

Fig.5b Transconductance (rms) of fixed input stage

 We see the balance in the AC current at Q1, Q2 and the transconductance being 100 times greater than the simple imput stage. In Fig.6a and Fig.6b the harmonic content for simple and fixed input stages is shown for an input signal at 15kHz.

Fig.6a Harmonics @15kHz for Simple Input Stage

Fig.6b Harmonics @15kHz for Fixed Input Stage